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2 w, filterless, class-d stereo audio amplifier ssm2306 rev. 0 information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ?2007 analog devices, inc. all rights reserved. features filterless class-d amplifier with built-in output stage 2 w into 4 and 1.4 w into 8 at 5.0 v supply ultralow idle current with load resistance >87% efficiency at 5.0 v, 1.4 w into 8 speaker better than 96 db snr (signal-to-noise ratio) available in 16-lead, 3 mm 3 mm lfcsp single-supply operation from 2.5 v to 5.0 v 20 na ultralow sh utdown current short-circuit and thermal protection pop-and-click suppression built-in resistors reduce board component count default fixed 18 db gain and user-adjustable applications mobile phones mp3 players portable gaming portable electronics educational toys notebook computers general description the ssm2306 is a fully integrated, high efficiency, class-d stereo audio amplifier designed to maximize performance for portable applications. the application circuit requires minimum external components and operates from a single 2.5 v to 5.0 v supply. it is capable of delivering 2 w of continuous output power with less than 10% thd + n driving a 4 load from a 5.0 v supply. the ssm2306 features ultralow idle current, high efficiency, and a low noise modulation scheme. it operates with >87% efficiency at 1.4 w into 8 from a 5.0 v supply and has a signal-to-noise ratio (snr) that is better than 96 db. pdm modulation offers lower emi radiated emissions compared to other class-d architectures. the ssm2306 has a micropower shutdown mode with a typical shutdown current of 20 na. shutdown is enabled by applying a logic low to the sd pin. the architecture of the device allows it to achieve a very low level of pop and click to minimize voltage glitches at the output during turn-on and turn-off, thereby reducing audible noise on activation and deactivation. the fully differential input of the ssm2306 provides excellent rejection of common-mode noise on the input. input coupling capacitors can be omitted if the dc input common-mode voltage is approximately v dd /2. the ssm2306 also has excellent rejection of power supply noise, including noise caused by gsm transmission bursts and rf rectification. the ssm2306 has a preset gain of 18 db that can be reduced by using external resistors. the ssm2306 is specified over the commercial temperature range (?40c to +85c). it has built-in thermal shutdown and output short-circuit protection. it is available in a 16-lead, 3 mm 3 mm lead frame chip scale package (lfcsp). functional block diagram fet driver modulator 0.1f vdd vdd internal oscillator outr+ outr? outl+ outl? bias fet driver modulator inr+ vbatt 2.5v to 5.0v inr? shutdown inl+ inl? gnd gnd 10f 22nf 1 1 input caps are optional if input dc common-mode voltage is approximately v dd /2. 22nf 1 344k ? 344k ? gain = 344k ? /(43k ? + r ext ) 43k ? 43k ? 43k ? 43k ? r ext r ext r ext r ext 344k ? 344k ? 22nf 1 22nf 1 sd left in+ left in? right in? right in+ ssm2306 0 6542-001 figure 1.
ssm2306 rev. 0 | page 2 of 16 table of contents features .............................................................................................. 1 applications ....................................................................................... 1 general description ......................................................................... 1 functional block diagram .............................................................. 1 revision history ............................................................................... 2 specifications ..................................................................................... 3 absolute maximum ratings ............................................................ 4 thermal resistance ...................................................................... 4 esd caution .................................................................................. 4 pin configuration and function descriptions ............................. 5 typical performance characteristics ............................................. 6 typical application circuits ......................................................... 11 application notes ........................................................................... 12 overview ..................................................................................... 12 gain selection ............................................................................. 12 pop-and-click suppression ...................................................... 12 emi noise .................................................................................... 12 layout .......................................................................................... 13 input capacitor selection .......................................................... 13 proper power supply decoupling ............................................ 13 outline dimensions ....................................................................... 14 ordering guide .......................................................................... 14 revision history 4/07revision 0: initial version
ssm2306 rev. 0 | page 3 of 16 specifications v dd = 5.0 v; t a = 25 o c; r l = 4 , 8 ; gain = 6 db, unless otherwise noted. table 1. parameter symbol conditions min typ max unit device characteristics output power p o r l = 4 , thd = 1%, f = 1 khz, 20 khz bw, v dd = 5.0 v 1.8 w r l = 8 , thd = 1%, f = 1 khz, 20 khz bw, v dd = 5.0 v 1.4 w r l = 4 , thd = 1%, f = 1 khz, 20 khz bw, v dd = 3.6 v 0.9 w r l = 8 , thd = 1%, f = 1 khz, 20 khz bw, v dd = 3.6 v 0.615 w r l = 4 , thd = 1%, f = 1 khz, 20 khz bw, v dd = 2.5 v 0.35 w r l = 8 , thd = 1%, f = 1 khz, 20 khz bw, v dd = 2.5 v 0.275 w r l = 4 , thd = 10%, f = 1 khz, 20 khz bw, v dd = 5.0 v 2.4 w r l = 8 , thd = 10%, f = 1 khz, 20 khz bw, v dd = 5.0 v 1.53 w r l = 4 , thd = 10%, f = 1 khz, 20 khz bw, v dd = 3.6 v 1.1 w r l = 8 , thd = 10%, f = 1 khz, 20 khz bw, v dd = 3.6 v 0.77 w r l = 4 , thd = 10%, f = 1 khz, 20 khz bw, v dd = 2.5 v 0.45 w r l = 8 , thd = 10%, f = 1 khz, 20 khz bw, v dd = 2.5 v 0.35 w efficiency p out = 2 w, 4 , v dd = 5.0 v 75 % p out = 1.4 w, 8 , v dd = 5.0 v 85 % total harmonic distortion + noise thd + n p o = 2 w into 4 each channel, f = 1 khz, v dd = 5.0 v 0.4 % p o = 1 w into 8 each channel, f = 1 khz, v dd = 5.0 v 0.02 % input common-mode voltage range v cm 1.0 v dd ? 1 v common-mode rejection ratio cmrr gsm v cm = 2.5 v 100 mv at 217 hz, g = 18 db, input referred 70 db channel separation x talk p o = 100 mw , f = 1 khz 78 db average switching frequency f sw 420 khz differential output offset voltage v oos 2.0 mv power supply supply voltage range v dd guaranteed from psrr test 2.5 5.0 v power supply rejection ratio psrr v dd = 2.5 v to 5.0 v 70 85 db psrr gsm v ripple = 100 mv rms at 217 hz, inputs ac gnd, c in = 0.1 f, input referred 75 db supply current i sy v in = 0 v, no load, v dd = 5.0 v 6.5 ma v in = 0 v, no load, v dd = 3.6 v 5.7 ma v in = 0 v, no load, v dd = 2.5 v 5.1 ma shutdown current i sd sd = gnd 20 na gain closed-loop gain a v r ext = 0 18 db differential input impedance z in sd = vdd 43 k shutdown control input voltage high v ih i sy 1 ma 1.2 v input voltage low v il i sy 300 na 0.5 v turn-on time t wu sd rising edge from gnd to v dd 30 ms turn-off time t sd sd falling edge from v dd to gnd 5 s output impedance o ut sd = gnd >100 k noise performance output voltage noise e n v dd = 3.6 v, f = 20 hz to 20 khz, inputs are ac-grounded, a v = 18 db, r l = 4 , a weighting 44 v signal-to-noise ratio snr p out = 2.0 w, r l = 4 96 db
ssm2306 rev. 0 | page 4 of 16 absolute maximum ratings absolute maximum ratings apply at 25c, unless otherwise noted. table 2. parameter rating supply voltage 6 v input voltage v dd common-mode input voltage v dd esd susceptibility 4 kv storage temperature range ?65c to +150c operating temperature range ?40c to +85c junction temperature range ?65c to +165c lead temperature (soldering, 60 sec) 300c stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. thermal resistance ja is specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages. table 3. thermal resistance package type ja jc unit 16-lead, 3 mm 3 mm lfcsp 44 31.5 c/w esd caution
ssm2306 rev. 0 | page 5 of 16 pin configuration and fu nction descriptions pin 1 indicator nc = no connect 1 outl+ 2 outl? 3 sd 4 inl+ 11 outr? 12 outr+ 10 nc 9 inr+ 5 i n l ? 6 n c 7 n c 8 i n r ? 1 5 v d d 1 6 g n d 1 4 v d d 1 3 g n d top view (not to scale) ssm2306 06542-002 figure 2. pin configuration table 4. pin function descriptions pin no. mnemonic description 1 outl+ inverting output for left channel. 2 outl? noninverting output for left channel. 3 sd shutdown input. active low digital input. 4 inl+ noninverting input for left channel. 5 inl? inverting input for left channel. 6 nc no connect. 7 nc no connect. 8 inr? inverting input for right channel. 9 inr+ noninverting input for right channel. 10 nc no connect. 11 outr? noninverting output for right channel. 12 outr+ inverting output for right channel. 13 gnd ground for output amplifiers. 14 vdd power supply for output amplifiers. 15 vdd power supply for output amplifiers. 16 gnd ground for output amplifiers.
ssm2306 rev. 0 | page 6 of 16 typical performance characteristics 100 0.001 0.01 0.0001 10 output power (w) thd + n (%) 10 1 0.1 0.001 0.01 0.1 1 v dd = 3.6v v dd = 5v v dd = 2.5v r l = 4 ? , 33h a v = 18db 06542-003 figure 3. thd + n vs. output power into 4 , a v = 18 db 100 0.001 0.01 0.0001 10 output power (w) thd + n (%) 10 1 0.1 0.001 0.01 0.1 1 v dd = 3.6v v dd = 5v v dd = 2.5v r l = 8 ? , 33h a v = 18db 06542-004 figure 4. thd + n vs. output power into 8 , a v = 18 db 100 0.001 0.01 0.0001 10 output power (w) thd + n (%) 10 1 0.1 0.001 0.01 0.1 1 r l = 4 ? , 33h a v = 6db v dd = 2.5v v dd = 3.6v v dd = 5v 06542-005 figure 5. thd + n vs. output power into 4 , a v = 6 db 100 0.001 0.01 0.001 0.01 0.0001 10 output power (w) thd + n (%) 10 1 0.1 0.1 1 v dd = 5v v dd = 2.5v r l = 8 ? , 33h a v = 6db v dd = 3.6v 06542-006 figure 6. thd + n vs. output power into 8 , a v = 6 db 100 0.001 10 100k frequency (hz) thd + n (%) 10 1 0.1 0.01 100 1k 10k 06542-007 0.25w 1w 0.5w v dd = 5v r l = 8 ? , 33h a v = 18db figure 7. thd + n vs. frequency, v dd = 5 v, r l = 8 , a v = 18 db 0.001 0.01 0.1 1 10 100 10 100 1k 10k 100k 06542-008 frequency (hz) thd + n (%) v dd = 5v a v = 18db r l = 4 ? , 33h 2w 1w 0.5w figure 8. thd + n vs. frequency, v dd = 5 v, r l = 4 , a v = 18 db
ssm2306 rev. 0 | page 7 of 16 0.001 0.01 0.1 1 10 100 10 100 1k 10k 100k 06542-009 frequency (hz) thd + n (%) v dd = 3.6v a v = 18db r l = 8 ? , 33h 0.5w 0.125w 0.25w figure 9. thd + n vs. frequency, v dd = 3.6 v, r l = 8 , a v = 18 db 0.001 0.01 0.1 1 10 100 10 100 1k 10k 100k 06542-010 frequency (hz) thd + n (%) v dd = 3.6v a v = 18db r l = 4 ? , 33h 0.25w 1w 0.5w figure 10. thd + n vs. frequency, v dd = 3.6 v, r l = 4 , a v = 18 db 0.001 0.01 0.1 1 10 100 10 100 1k 10k 100k 0 6542-011 frequency (hz) thd + n (%) v dd = 2.5v a v = 18db r l = 8 ? , 33h 0.075w 0.25w 0.125w figure 11. thd + n vs. frequency, v dd = 2.5 v, r l = 8 , a v = 18 db 0.001 0.01 0.1 1 10 100 10 100 1k 10k 100k 0 6542-012 frequency (hz) thd + n (%) v dd = 2.5v a v = 18db r l = 4 ? , 33h 0.125w 0.5w 0.25w figure 12. thd + n vs. frequency, v dd = 2.5 v, r l = 4 , a v = 18 db 4.0 4.5 5.0 5.5 6.0 6.5 7.0 7.5 2.5 3.0 3.5 4.0 4.5 5.0 5.5 06542-013 supply voltage (v) supply current (ma) i sy for both channels r l = 8 ? , 33h r l = 4 ? , 33h no load figure 13. supply current vs. supply voltage, no load 0 2 4 6 8 10 12 0 0.10.20.30.40.50.60.70.8 06542-014 shutdown voltage (v) supply current (a) vdd = 5v vdd = 2.5v vdd = 3.6v figure 14. supply current vs. shutdown voltage
ssm2306 rev. 0 | page 8 of 16 0 0.5 1.0 1.5 2.0 2.5 3.0 2.5 3.0 3.5 4.0 4.5 5.0 10% 1% 0 6542-015 supply voltage (v) output power (w) f = 1khz a v = 18db r l = 4 ? , 33h figure 15. maximum output power vs. supply voltage, r l = 4 , a v = 18 db 0 0.5 1.0 1.5 2.0 2.5 3.0 2.5 3.0 3.5 4.0 4.5 5.0 10% 1% 06542-016 supply voltage (v) output power (w) f = 1khz a v = 6db r l = 4 ? , 33h figure 16.maximum output power vs. supply voltage, r l = 4 , a v = 6 db 2.5 3.0 3.5 4.0 4.5 5.0 10% 1% 06542-017 supply voltage (v) output power (w) f = 1khz a v = 18db r l = 8 ? , 33h 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 figure 17. maximum output power vs. supply voltage, r l = 8 , a v = 18 db 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.53.03.54.04.55.0 10% 1% 0 6542-018 supply voltage (v) output power (w) f = 1khz a v = 6db r l = 8 ? , 33h figure 18. maximum output power vs. supply voltage, r l = 8 , a v = 6 db 0 10 20 30 40 50 60 70 80 90 100 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 06542-019 output power (w) efficiency (%) v dd = 5v v dd = 2.5v v dd = 3.6v r l = 4 ? , 33h figure 19. efficiency vs. output power into 4 0.20.40.60.81.01.21.41.61.8 v dd = 5v v dd = 2.5v v dd = 3.6v 0 10 20 30 40 50 60 70 80 90 100 0 06542-020 output power (w) efficiency (%) r l = 8 ? , 33h figure 20. efficiency vs. output power into 8
ssm2306 rev. 0 | page 9 of 16 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 06542-021 output power (w) power dissipation (w) v dd = 5v r l = 8 ? , 33h for both channels 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 figure 21. power dissipation vs. output power at v dd = 5 v, r l = 8 0 0 0.10.20.30.40.50.60.70.8 0 6542-022 output power (w) power dissipation (w) 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 v dd = 3.6v r l = 8 ? , 33h for both channels figure 22. power dissipation vs. output power at v dd = 3.6 v, r l = 8 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 06542-023 output power (w) power dissipation (w) v dd = 5v r l = 4 ? , 33h for both channels figure 23. power dissipation vs. output power at v dd = 5 v, r l = 4 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 0 0.10.20.30.40.50.60.70.80.91.01.11.21.31.41.51.6 06542-024 output power (w) power dissipation (w) v dd = 3.6v r l = 4 ? , 33h for both channels figure 24. power dissipation vs. output power at v dd = 3.6 v, r l = 4 0 100 200 300 400 500 600 700 800 900 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 06542-025 p o (w) i sy (ma) v dd = 5v v dd = 3.6v v dd = 2.5v r l = 8 ? , 33h i sy is for both channels figure 25. supply current vs. output power into 8 0 100 200 300 400 500 600 700 800 900 1000 1100 1200 1300 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 06542-026 p o (w) i sy (ma) v dd = 5v v dd = 3.6v v dd = 2.5v r l = 4 ? , 33h i sy is for both channels figure 26. supply current vs. output power into 4
ssm2306 rev. 0 | page 10 of 16 ?100 ?90 ?80 ?70 ?60 ?50 ?40 ?30 ?20 ?10 0 10 100 1k 10k 100k 06542-027 frequency (hz) psrr (db) 7 6 5 4 3 2 1 0 ?1 ?2 ?100 102030405060708090 time (ms) voltage (v) sd input output 06542-030 figure 27. psrr vs. frequency figure 30. turn-on response 7 6 5 4 3 2 1 0 ?1 ?2 ?20 0 20 40 60 80 100 120 140 160 180 time (ms) voltage (v) output 0 6542-031 sd input ?80 ?70 ?60 ?50 ?40 ?30 ?20 ?10 0 10 100 1k 10k 100k 06542-028 frequency (hz) cmrr (db) r l = 8 ? , 33h figure 31. turn-off response figure 28. cmrr vs. frequency ?140 ?120 ?100 ?80 ?60 ?40 ?20 0 10 100 1k 10k 100k 06542-029 frequency (hz) crosstalk (db) v dd = 3.6v v ripple = 1v rms r l = 8 ? , 33h figure 29. crosstalk vs. frequency
ssm2306 rev. 0 | page 11 of 16 typical application circuits fet driver modulator vdd vdd gnd gnd internal oscillator outr+ outr? outl+ outl? bias fet driver modulator inr+ inr? sd shutdown inl+ inl? 22nf 1 1 input caps are optional if input dc common-mode voltage is approximately v dd /2. 22nf 1 22nf 1 22nf 1 left in+ left in? right in? right in+ ssm2306 0.1f vbatt 2.5v to 5.0v 10f 0 6542-037 r ext r ext r ext r ext figure 32. stereo differential input configuration fet driver modulator vdd vdd gnd gnd internal oscillator outr+ outr? outl+ outl? bias fet driver modulator inr+ inr? sd shutdown inl+ inl? 22nf 22nf 22nf 22nf left in right in ssm2306 0.1f vbatt 2.5v to 5.0v 10f 0 6542-038 r ext r ext r ext r ext figure 33. stereo single-ended input configuration
ssm2306 rev. 0 | page 12 of 16 application notes overview the ssm2306 stereo, class-d, audio amplifier features a filterless modulation scheme that greatly reduces the external compo- nents count, conserving board space and, thus, reducing systems cost. the ssm2306 does not require an output filter; instead, it relies on the inherent inductance of the speaker coil and the natural filtering capacity of the speaker and human ear to fully recover the audio component of the square wave output. although most class-d amplifiers use some variation of pulse- width modulation (pwm), the ssm2306 uses sigma-delta (-) modulation to determine the switching pattern of the output devices. this provides a number of important benefits. - modulators do not produce a sharp peak with many harmonics in the am frequency band, as pulse-width modulators often do. - modulation provides the benefits of reducing the amplitude of spectral components at high frequencies; that is, reducing emi emission that might otherwise radiate by the use of speakers and long cable traces. the ssm2306 also offers protection circuits for overcurrent and overtemperature protection. gain selection the ssm2306 has a pair of internal resistors that set an 18 db default gain for the amplifier. it is possible to adjust the ssm2306 gain by using external resistors at the input. to set a gain lower than 18 db, refer to figure 32 for the differential input configu- ration and figure 33 for the single-ended configuration. calculate the external gain configuration as external gain settings = 344 k/(43 k + r ext ) pop-and-click suppression voltage transients at the output of audio amplifiers can occur with the activation or deactivation of shutdown. furthermore, voltage transients as low as 10 mv are audible as an audio pop in the speaker. likewise, clicks and pops are classified as undesirable audible transients generated by the amplifier system, and as such, as not coming from the system input signal. these types of transients generate when the amplifier system changes its operating mode. for example, the following can be sources of audible transients: ? system power-up/power-down ? mute/unmute ? input source change ? sample rate change the ssm2306 has a pop-and-click suppression architecture that reduces these output transients, resulting in noiseless activation and deactivation. emi noise the ssm2306 uses a proprietary modulation and spread- spectrum technology to minimize emi emissions from the device. figure 34 shows ssm2306 emi emission starting from 100 khz to 30 mhz. figure 35 shows ssm2306 emi emission from 30 khz to 2 ghz. these figures clearly depict the ssm2306 emi behavior as being well below the fcc regulation values, starting from 100 khz and passing beyond 1 ghz of frequency. although the overall emi noise floor is slightly higher, frequency spurs from the ssm2306 are greatly reduced. 70 0 0.1 100 frequency (mhz) level (db(v/m)) 60 50 40 30 20 10 11 0 = horizontal = vertical = regulation value 06542-039 figure 34. emi emissions from ssm2306 70 0 10 10k frequency (mhz) level (db(v/m)) 60 50 40 30 20 10 100 1k = horizontal = vertical = regulation value 06542-040 figure 35. emi emissions from ssm2306 the measurements for figure 34 and figure 35 were taken with a 1 khz input signal, producing 0.5 w output power into an 8 load from a 3.6 v supply. cable length was approximately 5 cm. to detect emi, a magnetic probe was used touching the 2-inch output trace to the load.
ssm2306 rev. 0 | page 13 of 16 layout as output power continues to increase, careful layout is needed for proper placement of pcb traces and wires between the ampli- fier, load, and power supply. a good practice is to use short, wide pcb tracks to decrease voltage drops and minimize inductance. make track widths at least 200 mil for every inch of track length for lowest dcr, and use 1 oz. or 2 oz. of copper pcb traces to further reduce ir drops and inductance. poor layout increases voltage drops, consequently affecting efficiency. use large traces for the power supply inputs and amplifier outputs to minimize losses due to parasitic trace resistance. proper grounding guide- lines help to improve audio performance, minimize crosstalk between channels, and prevent switching noise from coupling into the audio signal. to maintain high output swing and high peak output power, the pcb traces that connect the output pins to the load and supply pins should be as wide as possible to maintain the minimum trace resistances. it is also recommended to use a large area ground plane for minimum impedances. good pcb layouts isolate critical analog paths from sources of high interference; furthermore, separate high frequency circuits (analog and digital) from low frequency ones. properly designed multilayer printed circuit boards can reduce emi emission and increase immunity to rf field by a factor of 10 or more compared with double-sided boards. a multilayer board allows a complete layer to be used for the ground plane, whereas the ground plane side of a double-sided board is often disrupted with signal cross- over. if the system has separate analog and digital ground and power planes, the analog ground plane should be underneath the analog power plane, and, similarly, the digital ground plane should be underneath the digital power plane. there should be no overlap between analog and digital ground planes or analog and digital power planes. input capacitor selection the ssm2306 does not require input coupling capacitors if the input signal is biased from 1.0 v to v dd ? 1.0 v. input capacitors are required if the input signal is not biased within this recom- mended input dc common-mode voltage range, if high-pass filtering is needed (see figure 32 ), or if using a single-ended source (see figure 33 ). if high-pass filtering is needed at the input, the input capacitor together with the input resistor of the ssm2306 form a high-pass filter whose corner frequency is determined by the following equation: f c = 1/(2 r in c in ) input capacitors can have very important effects on the circuit performance. not using input capacitors degrades the output offset of the amplifier as well as the psrr performance. proper power supply decoupling to ensure high efficiency, low total harmonic distortion (thd), and high psrr, proper power supply decoupling is necessary. noise transients on the power supply lines are short duration voltage spikes. although the actual switching frequency can range from 10 khz to 100 khz, these spikes can contain fre- quency components that extend into the hundreds of megahertz. the power supply input needs to be decoupled with a good quality, low esl and low esr capacitor, usually around 4.7 f. this capacitor bypasses low frequency noises to the ground plane. for high frequency transients noises, use a 0.1 f capacitor as close as possible to the vdd pin of the device. placing the decoupling capacitor as close as possible to the ssm2306 helps maintain efficiency performance.
ssm2306 rev. 0 | page 14 of 16 outline dimensions 1 0.50 bsc 0.60 max p i n 1 i n d i c a t o r 1.50 ref 0.50 0.40 0.30 0.25 min 0.45 2.75 bsc sq top view 12 max 0.80 max 0.65 typ seating plane pin 1 indicato r 0.90 0.85 0.80 0.30 0.23 0.18 0.05 max 0.02 nom 0.20 ref 3.00 bsc sq * 1.65 1.50 sq 1.35 16 5 13 8 9 12 4 exposed pad (bottom view) * compliant to jedec standards mo-220-veed-2 except for exposed pad dimension. figure 36. 16-lead lead frame chip scale package [lfcsp_vq] 3 mm 3 mm body, very thin quad (cp-16-3) dimensions shown in millimeters ordering guide model temperature range package description package option branding ssm2306cpz-r2 1 ?40c to +85c 16-lead lead frame chip scale package [lfcsp_vq] cp-16-3 a1r SSM2306CPZ-REEL 1 ?40c to +85c 16-lead lead frame chip scale package [lfcsp_vq] cp-16-3 a1r SSM2306CPZ-REEL7 1 ?40c to +85c 16-lead lead frame chip scale package [lfcsp_vq] cp-16-3 a1r 1 z = rohs compliant part.
ssm2306 rev. 0 | page 15 of 16 notes
ssm2306 rev. 0 | page 16 of 16 notes ?2007 analog devices, inc. all rights reserved. trademarks and registered trademarks are the property of their respective owners. d06542-0-4/07(0)

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